Putting this all together yields the schematic below. 48 V µ n C ox = 102 µ A/V 2 Transistors Q1 and Q3 implement one inverter, while transistors Q2 and Q4 implement the second inverter. b. (c) For the matched case in (a), find the output resistance of the inverter in each of its two states. The NMOS transistor has an input from V SS or ground and the PMOS transistor has an input from V DD.When the input (A) is low (
consider a cmos inverter with matched transistors 2021